Explain register allocation in a compiler.
Assesses fundamental understanding of Compilers & Languages conventions, runtime behavior, and memory/performance considerations.
Hiring managers look for precision, avoidance of ambiguous jargon, and ability to explain trade-offs under real production conditions.
Register allocation assigns the many virtual registers produced by the compiler to the small, fixed set of physical CPU registers. It happens late, after instruction selection, and is critical because memory accesses dominate runtime.
The classic formulation builds an interference graph: two virtual registers interfere if their live ranges overlap, and they cannot share a physical register. The problem reduces to graph colouring, with the number of colours equal to the number of available registers.
a: def ... use
b: def ... use (overlap with a -> edge a-b)
Since graph colouring is NP-hard, compilers use heuristics. Chaitin-style allocation iteratively removes nodes with fewer than k neighbours; if none remain, a node is spilled. Spilling stores a value to memory and reloads it, adding code but making the graph colourable. Linear scan allocation is faster and used in JITs and debug builds. Other considerations include calling conventions, callee-saved registers and coalescing to remove copies.
Candidate Response Strategy & Interview Tips
- Start with a concise one-sentence summary: Deliver a direct, confident answer first before expanding into nuances.
- Demonstrate real-world trade-offs: Discuss where this approach excels and when you would avoid it in production systems.
- Discuss complexity & edge cases: Proactively explain time/space complexity or boundary conditions (null values, scale limits).
- Prepare for interviewer follow-ups: Technical hiring panels frequently probe deeper into concurrency, backward compatibility, or alternative libraries.